Pipeline and stages(pip version)

Use of Pipeline Stages in the Compactor

在某些情况下，pipeline stages有助于提升data through compactor logic的整体速率。 pipeline stages是由logic level上的寄存器维持中间值输出构成。 因此，在进入logic level后这些值可能会更快地更新。 通常情况下，并非所有设计都需要compactor pipeline stages以达到所需的shift frequency。

在配置EDT逻辑时，可以通过set_edt_options -pipeline_logic_level_in_compactor命令使得该逻辑在compactor中被配置为能够添加pipeline stages。

Use of Pipeline Stages Between Pads and Channel Inputs or Outputs

In cases where the signal propagation delays between an adder and its corresponding channel inputs or outputs become significant, one could consider adding pipeline stages.

通